26th International Workshop on Power and Timing Modeling, Optimization and Simulation
September 21 to 23, 2016



The deadline for the submissions are extended to the May 22, 2016

The best paper of VARI will be selected for a special issue on the Journal of Low Power Electronics - American Scientific Publishers. The best papers of PATMOS will be selected for a special issue on Integration, the VLSI Journal, by Elsevier.


PATMOS has a history of 26 years and it is one of the first conferences world-wide to focus on low power. PATMOS 2016 will be held in Bremen Germany. The traditional scope of the PATMOS conference series has mainly been about and around the design of circuits and architectures optimized for highest performance at lowest power consumption. But meanwhile, power-efficiency has become extremely important for many more areas spreading far beyond this traditional R&D niche. Energy-efficient ICT (Information and Communication Technology) infrastructures are a key issue of local and global economies. Some predict that until the year 2030, if current trends continue, the electricity consumption caused by the Internet to grow by up to 30 times. Energy prices will grow substantially. The next generation of oil and gas seismic simulations, for instance, will require orders of magnitude more computational power. Already during the past 11 years the price of crude oil increased by a factor of 9 with significantly increasing tendency in the future. The strong increase of wireless communication and the growth of cloud computing will further contribute to this trend. A future peta- or exa-flop supercomputer would need its own power plant if the gap between computation and power consumption could not be resolved: It is the intention of PATMOS 2016 to think beyond current solutions such that the very wide gap between computation and the massive energy consumption for ICT infrastructures can be closed.

Topics of Interest:

Authors are invited to submit manuscripts of original unpublished research. The topics of interest include, but are not limited to:

  • Timing and Performance
  • Low Power and Thermal-aware Design
  • Compilers, operating systems and runtime systems
  • FPGAs and GPU-based accelerators
  • Power-efficient High-performance ICT and Data Centers
  • Case studies
  • Application-specific power efficiency by algorithmic and analytic efforts
Accepted and presented papers will be published in IEEE Xplore®. All manuscripts will be blind reviewed by at least three members of the program committee. Submissions should be a complete manuscript of novel unpublished work (not to exceed 8 pages of single spaced text, including figures and tables) or, in special cases, may be a summary of relevant work. Submissions should be in pdf-format. The best papers will be selected for a special issue on Integration, the VLSI Journal, by Elsevier.


General Co-Chairs:
Alberto García-Ortiz, Univ. Bremen, Germany -
Domenik Helms OFFIS, Germany -

Program Co-Chairs:
Ricardo Reis, UFRGS, Brazil -
Aida Todri-Sanial, LIRMM, France -

Local Arrangements Chair:
Kerstin Janssen, Univ. Bremen - ITEM, Germany -
Wolfgang Büter, Univ. Bremen - ITEM, Germany -

Finance Chair:

Kerstin Janssen, Univ. Bremen, Germany -

Publication Chair:

Carolina Momo Metzler, UFRGS, Brazil -




Universität Bremen, FB 1
Institut für Theoretische Elektrotechnik und Mikroelektronik (ITEM)
Otto-Hahn Allee 1, 28359 Bremen
Gebäude NW 1