PATMOS & VARI 2016

Technical Program


Wednesday September 21, 2016

8:00 - 8:30

Registration

 

8:30 - 9:00

Welcome note from General and Program Chairs

 

9:00 - 10:00

Keynote

Design Technology Co-Optimization in Advance Technology Nodes

Prof. Asen Asenov, University of Glasgow, Scotland

 

10:00 - 10:30

Coffee Break

10:30 - 11:45

 

 

25 min

 

 

 

25 min

 

 

25 min

PATMOS Session on Power Reduction in Multi-core  Systems

Session chair: Ralph Görgen, OFFIS

 

Performance Estimation of Program Partitions on Multi-core Platforms

Malgorzata Michalska, Junaid Jameel Ahmad, Endri Bezati, Simone Casale Brunet and Marco Mattavelli

EPFL, Switzerland

Pipelining for Dual Supply Voltage

TengXu and Miodrag Potkonjak

University of California, Los Angeles, USA.

Thermally-Aware Composite Run-Time CPU Power Models

Matthew Walker1, Stephan Diestelhorst2, Andreas Hansson2, Domenico Balsamo2, Geoff Merrett1 and Bashir Al-Hashimi1

1University of Southampton, UK, 2ARM Ltd., UK.

 

11:45 - 13:00

 

 

 

25 min

 

 

25 min

 

  

25 min

PATMOS Special Session on

Optimization of thermal management and energy efficiency in nano-electronic devices and systems

Session Chair: T. Sadi, University of Glasgow

Investigation of Electro-Thermal Modeling and Analysis of Carbon Nanotube Interconnects

Aida Todri-Sanial

CNRS-LIRMM/University of Montpellier, France

Multi-Scale Electrothermal Simulation and Modeling of Resistive Random Access Memory Devices

Toufik Sadi, Liping Wang, Asen Asenov, University of Glasgow, Scotland

Thermoelectric Effects in Graphene and Graphene-Based Nanostructures using Atomistic Simulation

Philippe Dollfus, Viet Hung Nguyen, Van Truong Tran, Mai Chung Nguyen, Arnaud Bournel, Jerome Saint-Martin

CNRS/Universite Paris Sud, Paris

13:00 - 14:30

Lunch

14:30 - 16:00

 

  

22 min

 

 

 

22 min

 

 

22 min

  

22 min

PATMOS Special Session on

Near Threshold Computing

Session Chair: M. Tahoori, KIT

Fully Digital On-Chip Memory Using Minimum Height Standard Cells for Near-Threshold Voltage Computing

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera Graduate School of Informatics, Kyoto University, Japan

Hold-time Violation Analysis and Fixing in Near-Threshold Region

Mohammad Saber Golanbari, Saman Kiamehr, Mehdi Tahori KIT, Germany

Design Challenges for Near and Subthreshold Operation: A Case Study with an ARM Cortex-M0+ based WSN Subsystem

James Myers, Pranay Prabhat, Anand Savanth, Sheng Yang, Rohan Gaddh ARM Ltd, Cambridge, UK

Throughput Balancing for Energy Efficient Near-Threshold Manycores

Ioannis Stamelakos2, Sotirios Xydis1, Gianluca Palermo2, Cristina Silvano2

1National Technical University of Athens, Greece

2Politecnico di Milano, Italy

 

16:00 - 16:45

Coffee Break  and Poster Session

CMOS Process Transient Noise Simulation Analysis and Benchmarking

Thomas Noulis

Aristotle University of Thessaloniki, Greece

Secure Cryptographic Hardware Implementation Issues for High-Performance Applications

Erica Tena-Sánchez, Antonio José Acosta Jiménez and Juan Núnez Martínez.

Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Spain

Coarse-Grained Learning-Based Dynamic Voltage Frequency Scaling for Video Decoding

Jia Guo and Miodrag Potkonjak

University of California Los Angeles, USA

TransMem: A memory architecture to support dynamic Remapping and Parallelism in low power high performance CGRAs

Muhammad Adeel Tajammul, Syed Mohammad Asad Hassan Jafri, Ahmed Hemani and Peeter Ellerve

Royal Institute of Technology, Sweden

Deduplication in Resistive CAM Based SSD

Roman Kaplan, Leonid Yavits, Amir Morad and Ran Ginosar

Technion, Israel

Leakage Current Analysis in Static CMOS Logic Gates for a Transistor Network Design Approach

Jorge Tonfat, Guilherme Flach and Ricardo Reis UFRGS, Brazil

Run-Time Schedulability Check of Real-Time Tasks for Energy Efficiency

Parham Haririan and Alberto Garcia-Ortiz,

University of Bremen, Germany

Analysis of Stress Effects on Timing of nano-Scaled CMOS Digital Integrated Circuits

Hossein Aghababa, Mohammadreza Kolahdouz and Behjat Forouzandeh

University of Tehran, Iran

 

16:45 - 17:30

 

 

 

25 min

  

 

25 min

 

PATMOS Special Session on

Optimization of thermal management and energy efficiency in nano-electronic devices and systems

Session Chair: T. Sadi, University of Glasgow

Multiscale Modeling of Electron-Ion Interactions for Engineering Novel Electronic Devices and Materials.

Luca Larcher, Francesco Puglisi, Andrea Padovani, Luca Vandelli, Paolo Pavan, Universita di Modena e Reggio Emilia, Italy

Optimized Few Layer Graphene for Heat Spreading

Sebastian Volz, Haoxue Han

EM2C/ Ecole Centrale Paris, France

 

Thursday, September 22, 2016

8:30 - 9:30

Keynote**

Some Notes about the History of Low-Power

Prof. Christian Piguet, CSEM SA Neuchatel, Switzerland

**Celebrating Prof. Piguet ' s Career and Contribution to PATMOS

 

9:30 - 11:00

 

 

25 min

 

 

 

25 min

  

 

20 min

 

 

 

20 min

VARI Regular Session on Variability and aging in the circuit design process

Session Chair: Prof. Steffen Paul, ITEM

Design and Verification of Analog CMOS Circuits Using the gm/ID-Method with Age-Dependent Degradation Effects

Theodor Hillebrand, Timur Schäfer, Nico Hellwege, Dagmar Peters-Drolshagen and Steffen Paul.

University of Bremen, Germany

RRAM Variability and Its Mitigation Schemes

Peyman Pouyan1, Esteve Amat1, Said Hamdioui1 and Antonio Rubio2

1TU Delft, Netherlands, 2UPC, Spain

A Framework for Analyzing the Propagation of Hardware-induced Errors in Linear Time-invariant Blocks with Finite Wordlength Effects

Georgia Psychou, Tobias Gemmeke and Tobias G. Noll.

Imec, Belgium

Investigating PVT Variability Effects on Full Adders

ViníciusZanandrea, Stéphanie Ames, Ingrid Oliveira, Samuel Toledo and Cristina Meinhardt

Universidade Federal do Rio Grande, Brazil

11:00 - 11:30

Coffee Break

 

11:30 - 12:30

 

 

Keynote

Time-Dependent Variability in Scaled MOS-Transistors

Prof. Tibor Grasser, TU Wien, Austria

12:30 - 14:00

Lunch

 

14:00 - 15:00

 

 

VARI Tutorial: Variability and Reliability trouble Semiconductor Product Design

Presenter Dr. Christian Schlünder, Infineon Technologies AG

15:00 - 16:20 

20 min

 

20 min

 

 

20 min

 

 

20 min

PATMOS Session on European Projects

Project  CONNECT

Presenter: Aida Todri-Sanial, CNRS, France

Project  SUPERAID7: Stability Under Process Variability for Advanced Interconnects and Devices Beyond 7 nm node

Presenter: Jürgen K. Lorenz, Fraunhofer IISB

 Project  nanoCOPS

Presenter: Presenter: Jan ter Maten, University of Wuppertal

 

Project CLERECO: Cross-Layer Early Reliability Evaluation for the Computing cOntinuum

    Presenter: Stefano Di Carlo - Politecnico di Torino

 

16:20  - 17: 00

Coffee Break and Poster Session

Loop Optimization in Presence of STT-MRAM Caches: a Study of Performance-Energy Tradeoffs

Pierre-Yves Péneau1, Rabab Bouziane2, Abdoulaye Gamatie1, Erven Rohou2, Florent Bruguier1, Gilles Sassatelli1, Lionel Torres1 and Sophiane Senni1.

LIRMM, France, INRIA, France

Securing Embedded Systems and their IPs with Digital Reconfigurable PUFs

Jason XinZheng, TengXu and Miodrag Potkonjak

University of California Los Angeles, USA

Energy Efficiency of 2-Step Power-Clock for Adiabatic Logic

Himadri Singh Raghav, Vivian Bartlett and Izzet Kale

University of Westminster, UK

A Software Framework to Calculate Local Temperatures in CMOS Processors

Alireza Rohani, Hassan Ebrahimi and Hans Kerkhoff

University of Twente, Netherlands

Subthreshold-based m-sequence code generator for ultra low-power body sensor nodes

 

Ahmad Abdulfattah, Charalampos Tsimenidis and Alex Yakovlev

Newcastle University, UK

Novel Memristive Logic Architectures

Xiaohan Yang, Adedotun Adeyemo, Anu Bala and Abusaleh Jabir

 

Oxford Brookes University, UK

 

Using Iddt Current Degradation to Monitor Ageing in CMOS Circuits

Radi Husin Ramlee and Mark Zwolinski

 

 

 

PMHLS 2.0: An Automated Optimization of Power Management During High-Level Synthesis

Dominik Macko

Slovak University of Technology in Bratislava, Slovakia

 

 

17:00 - 18:00

  

25 min

 

 

 

25 min

 

 

 

 

 

PATMOS Session on Low-Power Design

 

Enabling Environmentally-Powered Indoor Sensor Networks With Dynamic Routing and Operation

Jia Guo, Teng Xu, Theano Stavrinos and Miodrag Potkonjak

University of California Los Angeles, USA

Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee

Vojtech Mrazek and Zdenek Vasicek

Brno University of Technology, Czech Republic

19:00 - xx

Banquet Dinner

 

Friday, September 23, 2016

8:30 - 10:00

 

 

25 min

 

 

  

 

25 min

 

 

 

 

25 min

 

 

 

 

PATMOS Session on Design of Reliable and Energy Efficient Systems

Session Chair: Nils Koppaetzky, OFFIS

Comparison of Low-Voltage Scaling in Synchronous and Asynchronous FD-SOI Circuits

Thiago Ferreira de Paiva Leite, Rodrigo Possamai Bastos, Rodrigo Iga and Laurent Fesquet

Univ. Grenoble Alpes, CNRS, TIMA, Grenoble, France

 

Green Metadata Based Adaptive DVFS for Energy Efficient Video Decoding

Yahia Benmoussa1, Eric Senn1, Nicolas Derouineau2, Niclas Tizon2, and Jalil Boukhobza3

1Universite de Bretagne Sud, France, 2Vitec, France, 3Universite de Bretagne Occidentale, France

 

Pushing Minimum Energy Limits by Optimal Asymmetrical Back Plane Biasing in 28 nm UTBB FD-SOI

Francisco Veirano1, Lirida Naviner2 and Fernando Silveira1

1Universidad de la República, Uruguay, 2Telecom ParisTech, France

 

10:00 - 10:30

Coffee Break

10:30 - 12:00

  

 

25 min

 

 

 

25 min

 

 

 

25 min

 

 

 

10 min

PATMOS Session on Modeling and Simulation of Emerging Devices and Interconnects

Session Chair: Domenik Helms, OFFIS

Physical Description and Analysis of Doped Carbon Nanotube Interconnects

Jie Liang, Liuyang Zhang, Nadine Azemard-Crestani, Pascal Nouet, Aida Todri-Sanial

CNRS-LIRMM/University of Montpellier France

Impact of Pipeline in the Power Performance of Tunnel Transistor Circuits

María J. Avedillo and Juan Núñez

Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Spain

Energy Modeling of Coupled Interconnects including Misalignment Effects

Amir Najafi, Ardalan Najafi, Ayad Dallo, Lennart Bamberg and Alberto Garcia-Ortiz

ITEM Institute, Univerity of Bremen, Germany

A Novel Leakage Power Reduction Technique for Nano-Scaled CMOS Digital Integrated Circuits

Hossein Aghababa, Mohammadreza Kolahdouz and Behjat Forouzandeh

University of Tehran, Iran

12:00 - 13:30

Lunch

13:30 - 15: 00

  

 

 

22 min

 

  

 

 

22 min

 

 

 

22 min

 

 

 

22 min

 

PATMOS Special Session on

Power Aware Heterogeneous MPSoC - Memory & NoC Optimization

Session Organizers: Jürgen Becker, Peter Figuli, Falco Bapp, KIT, Germany

Energy Profile Analysis of Zynq-7000 Programmable SoC for Embedded Medical Processing: Case study on ECG Arrhythmia Detection

Konstantions Railis, Vasileios Tsoutsouras, Sotirios Xydis, Dimitrios Soudris

TU Athens, Greece

A New Bank Sensitive DRAM Power Model for Efficient Design Space Exploration

Matthias Jung, Deepak M. Mathew, Eder F. Zulian, Christian Weis, Norbert Wehn

TU Kaiserslautern, Germany

The Long Way to Power Efficient, High Performance DRAMs

Klaus Hofmann

TU Darmstadt, Germany

 

Document Classification Systems in Heterogeneous Computing Environments

Nasibeh Nasiri1, Philip Colangelo1, Oren Segal1, Martin Margala1, Wim Vanderbauwhede2

1UMASS, USA

2University of Glasgow, UK

15:00 - 16:30

  

22 min

 

 

22 min

 

22 min

 

22 min

 

 

PATMOS Session on European Projects

Session Chair: Domenik Helms, OFFIS, Germany

Project: BASTION Board and SoC Test Instrumentation for Ageing and No Failure Found

Presenter:  Artur Jutman - Testonica

Project: MoRV: Modelling Reliability under Variability

Presenter: Nils Koppaetzky, OFFIS

Project ARGO: WCET-Aware Parallelization of Model-Based Applications for Heterogeneous Parallel Systems

Presenter: Harald Buchner, KIT

Project Contrex: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties

Presenter: Ralph Görgen, OFFIS

 

16:30 - 17:20

 

 

                25 min

 

 

                25 min

 

 

17:20 - 18:00

PATMOS Special Session on Optimization of Thermal Management and Energy Efficiency in Nano-Electronic Devices and Systems

Session Chair: T. Sadi, University of Glasgow

Multiscale Modeling of Electron-Ion Interactions for Engineering Novel Electronic Devices and Materials

Luca Larcher, Francesco Puglisi, Andrea Padovani,Luca Vandelli, Paolo Pavan, Universita di Modena e Reggio Emilia, Italy

Optimized Few Layer Graphene for Heat Spreading

Sebastian Volz, Haoxue Han EM2C/ Ecole Centrale Paris, France

 

Closing & Award Ceremony

Refreshment




Contact

Universität Bremen, FB 1
Institut für Theoretische Elektrotechnik und Mikroelektronik (ITEM)
Otto-Hahn Allee 1, 28359 Bremen
Gebäude NW 1
+49-421-218-62534
janssen(at)item.uni-bremen.de